- Arria 10 GX FPGA (10AX115N2F45E1SG)
- Half-length PCIe Gen3 x8 board
- Four QSFP+ connectors
- Six independent 550MHz QDRII+ SRAMs
- Stratix V GX FPGA 5SGXEA7K2F40C2N
- DDR3 SDRAM, QDR II+ SRAM, RLDRAM II
- PCIe x8, HSMC, SDI, QSFP, Gigabit Ethernet
- Cyclone III EP3C120F780 FPGA
- DDR2, SRAM, Flash
- Gigabit Ethernet, Graphics LCD, HSMC, USB
- Featured device: 5SGXEA7N2F45C2N
- DDR3 SDRAM, QDR II
- QSFP, SFP+, SMA, CFP, Interlaken interface, Gigabit Ethernet
- 15 papers featured in this collection
- Included award-winning projects from the 2012 InnovateAsia Design Competition
- PDF File Download
- Stratix V GS FPGA: 5SGSMD5K2F40C2N
- DDR3 SDRAM, QDR II+ SRAM, RLDRAM II
- PCIe x8, QSFP, Gigabit Ethernet, SDI, HSMC
- 2 * Arria V GT FPGA 5AGTD7K3F40I3N
- DDR3 SDRAM, QDR II+ SRAM, flash
- HSMC, FMC, PCIe x8, SFP+, SDI
- A license for Altera's SDK for OpenCL
- Quartus® II Development Kit Edition software (one-year evaluation license)
- 2 Stratix V GX FPGA 5SGXEA7N2F45C2N
- DDR3 SDRAM, QDR II+ SRAM, SRAM, flash
- PCIe x16, FMC connector, HSMC port
- Arria 10 GX FPGA （10AX115S2F45I1SG）
- 1 GB DDR4 SDRAM, 2GB DDR3 SDRAM, and RLDRAM3 (16 Meg x 36) daughtercards
- One QSFP and one SFP+ connectors, one PCI Express (PCIe) x8 edge connector
- Two FMC low-pin count (LPC + 15 transceivers) connector
- Stratix V GX FPGA 5SGXEA7N2F40C2N
- Configuration flash
- 28 full-duplex transceiver channels
- Cyclone V GX FPGA 5CGXFC7D6F31C7NES
- DDR3 SDRAM, flash
- USB, Gigabit Ethernet, PCIe x4, HSMC, SDI, DVI I/O
- Stratix V GT 5SGTMC7K3F40C2N
- Configuration flash
- 32 full-duplex GXB transceiver channels (up to 28.05 Gbps), Gigabit Ethernet
- Arria V GX 5AGXFB3H4F35C5NES
- DDR3 SDRAM, SSRAM
- HDMI 1.3 TX, SDI 3G, Ethernet, DVI I/O
- Bundled with Terasic Starter Platform for OpenVINO ™ Toolkit and Intel IoT Dev. Kit (UP2)
- Use FPGA as OpenVINO hardware acceleration engine and provide pre-compiled FPGA bitstream
- Ideal coding environment for OpenVINO developer as standalone system
The low-cost Cyclone® II FPGA Starter Development Kit is ideal for evaluating Altera's high-performance, low-power, 90-nm technology. By using this RoHS compliant starter development kit, you will see 60 percent (on average) higher performance and 50 percent (on average) lower power than competing 90-nm, low-cost FPGAs. Several reference designs and demonstrations included in the kit make for a quick, "out-of-the-box" evaluation experience.
- Cyclone V E FPGA - 5CEFA7F31I7N
- DDR3, LPDDR2, Flash, SSRAM, EEPROM
- Ethernet, UART interface, HSMC, DVI I/O
- Cyclone IV EP4CE115 with ~114,480 LEs
- 2 Gigabit Ethernet Ports, HSMC connector
- 128MB SDRAM, 2MB SRAM, 8MB Flash
Nowadays the whole world is working on high-end multi-layer PCB designs that operate at more than 10Gb/s, with the integration of high-speed circuitry analysis, theories and simulation technique experiences. Thus, American or European companies dominate in such markets. Few Asian companies have the resources to compete with American and European competitors in this niche market. Going along with TSMC, UMC and other large wafer manufacturers that are experiencing rapid breakthroughs in FPGA development, with 90nm quickly shrank all the way down to 28nm, and IO speeds gaining from 10Gb/s up to 30 Gb/s, the market demand for precise FPGA hardware and PCB design is likewise rapidly accelerating.
- Stratix V GX FPGA 5SGXEA7K2F40C2N
- DDR3 SDRAM, QDR II+ SRAM, RLDRAM II
- PCIe x8, HSMC, SDI, QSFP, Gigabit Ethernet, DVI I/O