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  • Cyclone III EP3C120F780 with ~120,000 LEs
  • DDR2 SO-DIMM
  • Support LVDS standard

  • 256,000 logic elements (LEs)
  • 102,600 adaptive logic modules (ALMs)
  • 11,756 Kb on-chip memory

  • Develop designs for the 10M50D, F484 package FPGA
  • Measure the performance of the MAX 10 FPGA analog-to-digital block conversion
  • Interface MAX 10 FPGAs to DDR3 memory at 300 MHz performance
  • Run embedded Linux using the Nios® II processor

  • Cyclone III EP3C120F780 with ~120,000 LEs
  • 256MB DDR2 SDRAM, 8 MB SSRAM, and 64MB Flash
  • Gigabit Ethernet and Grapic LCD

 

  • Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
  • 1GB DDR3 and 64MB SDRAM
  • VGA Out, Video-In, UART-to-USB, USB Host x2, Micro SD Card Socket, 1Gbps Ethernet, and HSMC/GPIO Headers
  • 800x480 5-point touch, 8Mega Pixel Camera, 9-axis sensor and amblient light sensror

  • Stratix V GX 5SGXEA7N2F45C2N
  • DDR3 SO-DIMM and FMC x4 Connectors
  • Large ASIC Prototyping Applications

  • Intel Stratix® V GX FPGA (5SGXEA3K2F40C3)
  • On-Board USB Blaster II or JTAG header for FPGA programming
  • Fast passive parallel (FPPx32) configuration via MAX II CPLD and flash memory
  • SSRAM, FLASH

  • Cyclone V E FPGA - 5CEFA7F31I7N
  • DDR3 x32 at 300 MHz (soft memory controller)
  • On-board USB-BlasterTM II cable (USB, PHY, Max® V CPLD)

  • Evaluate Intel® Arria® 10 SoC device features and performance.
  • Begin development of your hardware and software design.
  • Use as a platform for target reference designs, OS/BSP, and tools.

  • Cyclone IV GX EP4CGX150N FPGA
  • DDR2 SDRAM, SSRAM, flash
  • PCIe x4, Gigabit Ethernet, HSMC

  • Intel® Agilex™ F-Series FPGA AGFB014R24B2E2V
  • Two QSFPDD connectors for 200/100/40/25/10 GbE network interface
  • Four independent DDR4 SODIMM sockets
  • PCIe Gen4 x16

  • Altera Stratix® V GX FPGA (5SGXEA7N2F45C2)
  • Two SFP+ connectors, One Serial ATA (SATA II) host port
  • DDR3 SDRAM, ISSI, FLASH

  • Arria V ST SoC—5ASTFD5K3F40I3NES (SoC)
  • MAX® V CPLD—5M2210ZF256C4N (system controller)
  • MAX II CPLD—EPM570GF100 (embedded USB-BlasterTM II cable)

  • Please check our new VEEK-MT.
  • Cyclone IV EP4CE115 with ~114,480 LEs
  • 5-Megapixel Digital Image Sensor Module
  • 8" LCD Touch Screen Module

  • Two motor axes, each with three-phase MOSFET power stages operating up to 125 kHz
  • Input voltage range 9 to 16 V DC
  • DC link voltage of 12 to 48 V from DC-DC boost-buck converter
  • Enpirion® switch mode power supplies for logic, position sensors, MOSFET gate drives and regulated 12 V output
  • Sigma-delta ADCs for sensing voltages and currents
  • Direct analog connection to suitable development kits such as the MAX® 10M50 Development Kit
  • Sensed motor phase currents and voltages to enable sensorless control
  • Position feedback interfaces for each axis

  • Stratix IV GX EP4SGX230KF40C2N FPGA
  • DDR3 SDRAM, QDR II+ SRAM, flash, SSRAM
  • PCIe x8, Gigabit Ethernet, HSMC, HDMI, 3G-SDI

  • Formerly the USB-Blaster II, implements the faster USB 2.0 High-Speed protocol to drive configuration or programming data from the PC to configure or program Intel PSG devices.
  • RoHS and USB Hi-Speed (USB 2.0) compliant
  • Supports standard USB PC ports

The significant improvements in FPGA performance and the dramatic reduction in costs have opened up the use of programmable logic to a universe of new products. Such improvements have made programmable logic even more essential for product development, education, and research. Terasic is dedicated to provide a wide range of various FPGA based boards for academia and to industries that combine quality, performance, and low cost to meet every single requirement.

  • Intel® Arria® 10 GX FPGA with 1150K logic elements
  • Total 8 GB DDR4-2133 memory
  • 1024Mb QSPI Flash
  • One Thunderbolt™ 3 port for host communication and on-board USB-Blaster II function
  • Power/temperature monitor and auto fan speed control