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母板 Arria 10 TR10a-HL Arria 10 FPGA Development Kit
 
TR10a-HL

TR10a-HL Arria 10 FPGA Development Kit

 

FPGA

  • Altera Arria 10 GX FPGA (10AX115N2F45E1SG)

 

FPGA Configuration

  • On-Board USB Blaster II or JTAG header for FPGA programming
  • Fast passive parallel (FPPx32) configuration via MAX II CPLD and flash memory

Memory

  • 256MB FLASH
  • 6 Independent 550 MHz QDRII+SRAMs, 18-bits data bus and 72Mbit for each ( * )

 

Communication and Expansion

  • Four QSFP+ connectors
  • PCI Express (PCIe) x8 edge connector (includes Windows PCIe drivers)
  • One 2x5 RS422 expansion header
  • One 2x4 GPIO expansion header

Others

  • General user input / output:
    • 4 LEDs
    • 1 Bracket LED Array
    • 4 push-buttons
    • 2 DIP switches
  • On-Board Clock
    • 50MHz Oscillator
    • Programmable Clock Generator
  • System Monitor and Control
    • Temperature sensor
    • Power Monitor
    • Fan control
  • Power
    • PCI Express 6-pin power connector, 12V DC Input
    • PCI Express edge connector power
  • Mechanical Specification
    • PCI Express standard height and 1/2-length

 

Block Diagram



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