System

• FPGA:
  • AGIB027R29A1E2VB (Support CXL)
• Board Size: PCIe Full Height and 3/4 Length
• FPGA Configuration
  • Onboard USB-Blaster II
  • AVSTx8 Configure with 2Gbit QSPI Flash.
  • ASx4 Configure with 1Gbit QSPI Flash.
• Board Management System
  • Power Monitor
  • Temperature Monitor
  • Auto fan Control

FPGA side

• PCIe Gen5 x16 and CXL x16
• Four DDR4 SO-DIMM Socket, shared with HPS.
• Two QSFP-DD Port for 400 (*1) 200/100/40/25/10 GbE network interface.
• Two MCIO 8x connectors to support PCIe and CXL
• 2x5 Timing Expansion Header
• U.FL clock input / output
• 1x5 Bracket LED Expansion Header
• User LED x4, Button x2, DIP Switch x2

• 1: Only QSFP-DD B port can support

HPS side

• MicroSD Socket
• One: DDR4 SO-DIMM Socket shared with FPGA
• Gigabit Ethernet PHY with RJ45 Port
• UART to USB Port
• USB OTG with MicroUSB Connector
• LED x1, Button x1, Cold Reset Button

Software Support

• FPGA Example Code
• Linux BSP
• OneAPI BSP (coming soon)

Block Diagram