|Data Conversion HSMC reference manual||1.0.1||712(KB)||2011-07-01|
友晶科技所发表之范例程式码，基於免费分享之原则，不提供任何形式的讲解或修改。如需进一步范例程式码讲解或修改的协助，我们将转至 "设计服务部门" 评估。
本授权条款允许使用者於使用所有友晶及 Intel 开发板时，得以重制、散布、传输以及修改友晶科技提供的源码，但不得为商业目的之使用。使用时必须於引用处表彰友晶科技 (Terasic Inc.) 之商号。
The Data Conversion HSMC CD includes a reference design which contains two sine waves that are generated by two instances of the Altera numerically controlled oscillator (NCO) MegaCore. One of these oscillators is running at 10 times the frequency of the other, but both of them have the same amplitude with each one covering 13 bits of dynamic range. From these blocks, the two sine waves output are converted from two’s complement binary to unsigned binary format which then are added together. The combined sine wave signal of 14-bits dynamic range is sent to a 14-bit D/A converter. The analog output of a D/A converter is connected via SMA Cable with the analog input of a 14-bit A/D converter. The A/D converter’s digital output is looped back to the FPGA device. The A/D is configured by the dip switches to deliver the data in unsigned format. The converted loopback data is captured by an instance of the SignalTap® II logic analyzer in the design for display and analysis.
The following figure below shows a high-level view of the reference design and how it interacts with the D/A and A/D converters on the Data Conversion HSMC in the following sections.
You can use MATLAB software to analyze the data.
The following figure below is generated using SignalTap to capture and analyze data.