搜尋

  • Cyclone II EP2C20F484 with ~20,000 LEs
  • 8MB SDRAM, 512K SRAM, and 4MB Flash
  • Audio/Video interface, RS232, and SD card
  • 同 Cyclone II Starter Kit

  • Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
  • 1GB DDR3 and 64MB SDRAM
  • VGA Out, Video-In, UART-to-USB, USB Host x2, Micro SD Card Socket, 1Gbps Ethernet, and GPIO Headers

  • Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
  • 1GB DDR3 SDRAM (32-bit data bus) (HPS)
  • Arduino Expansion Header (Uno R3 Compatibility), Full HD HDMI Output, UART-to-USB, USB OTG Port, Micro SD Card Socket, Gigabit Ethernet and GPIO Headers

  • Intel Cyclone V SoC FPGA,ARM Cortex-A9 雙核 HPS
  • FPGA:SDRAM、VGA 輸出、Video 輸入、ADC 接頭、GPIO 接頭、HSMC 接頭
  • HPS:DDR3、USB Host 埠、MicroSD 卡槽、乙太網、UART 轉 USB、LTC 接頭
  • 支持 Linux BSP 和 openCL BSP

  • MAX 10 10M50DAF484C7G Device
  • Accelerometer and 4-bit Resistor VGA 
  • 64MB SDRAM, x16 bits data bus
  • Arduino UNO R3 and 2x20 GPIO connector
  • On-Board USB Blaster (Normal type B USB)

產品共有四種組合
  • DE2-70 / DE2 / DE1 + LTM + D5M
  • DE2 + DC2 +LCM

  • Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
  • 1GB DDR3 and 64MB SDRAM
  • VGA Out, Video-In, UART-to-USB, USB Host x2, Micro SD Card Socket, 1Gbps Ethernet, and GPIO Headers
  • Touch & LCD Spec

  • Drive up to 24 servo motors simultaneously 
  • MG996R Servo Motor is included
  • Open source example is provided

  • By JIEN-CHUNG LO
  • ISBN 978-986-91529-0-7

  • 2.4" LCD touch module with 240(H) x 320 (V) pixel resolution LCD with 65K RGB color
  • Single resistive touch
  • 2x20 GPIO interface

  • Intel Stratix 10 GX/SX FPGA
  • Four QSFP28(100GbE) connectors and one PCI Express (PCIe) x16 edge connector
  • Four independent DDR4 SODIMM sockets (work with DDR4/QDR-II+/QDR-IV)

  • Omnivision 8 Mega Pixel Image sensor
  • Voice Coil Motor (VCM) for focus control
  • MIPI Decoder
  • 2x20 GPIO to compatible with DE series FPGA Board

  • 7" LCD, 800x480 Resolution,  24-bit Color
  • Capacitive Touch, Multi-Touch Gesture Support, Single Touch Support
  • 2x20 GPIO Interface, Compatible with DE2-115 / DE2 / DE3 /DE4

  • Configurable digital interface to a processor—RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers
  • Operates in the 70 MHz to 6.0 GHz range—covers most licensed and unlicensed bands
  • Tunable Channel Bandwidth—<200 kHz to 56 MHz
  • Complete dual- or single-channel integrated wideband transceiver on a single chip

RFS

  • Wi-Fi, using ESP-WROOM-02 module
  • Bluetooth SPP, using HC-05 module
  • 9-axis sensor: accelerometer,gyroscope,magnetometer
  • Ambient light sensor
  • Humidity and temperature sensor
  • UART to USB
  • 2x6 TMD GPIO Header 

  • Intel® Agilex™ F-Series FPGA  AGFB014R24B2E2V
  • Two QSFPDD connectors for 200/100/40/25/10 GbE network interface
  • Four independent DDR4 SODIMM sockets
  • PCIe Gen4 x16

  • 12V DC switching supply with 2A current
  • 輸入電壓 : AC 100~240V 50/60Hz
  • 輸出電壓: DC 12V/2A
  • 配件尺寸: 98.4*45*31.4 mm
  • 適用產品: DE1- SoC / DE2-115 / DE2-70 / C5G / NEEK  

As the pioneering FPGA-based product and design service supplier, Terasic never stops looking for innovating and cutting-edge ideas! This time, we challenge you to conduct a technical review and provide ideas that will ignite sparks of creativity for our flagship product, DE10-Standard. All users of Terasic FPGA board are welcome to participate in this event!