A Review of the Cyclone V GX Starter Kit
Orlando Arias
My name is Dr. Orlando Arias and I am an Assistant Professor of Electrical and Computer Engineering at the University of Massachusetts Lowell. I head the Secure by Design Laboratory at the university which focuses on hardware-assisted cybersecurity solutions, methods for HDL analysis, and fault characterization. I also teach Advanced Digital Systems Design (ADSD), a hybrid graduate and undergraduate class as well a Practical Hardware Security and Cryptography class. It must be said that Intel and Terasic’s unyielding support has made these classes the success they are. We would like to express our gratitude for their help in ensuring that we have both quality software and hardware for students to utilize.
We are starting to utilize the Cyclone V GX Starter Kit in ADSD to great success. We lend these boards to students for the duration of the semester so that they can work outside of class. The boards are of high quality and mechanically sturdy, which allows for ease of transport. The acrylic shield further protects the board from extraneous components falling on top of the delicate components while students are performing experiments.
In class, students make use of the board to create unclonable functions, computational accelerators to generate fractals in real time, perform timing closure on designs that contain multiple clock domains, as well as develop and package intellectual property cores. With the Cyclone V GX Starter Kit, students are able to see the physical manifestation of their hardware designs, bringing a satisfying conclusion to their efforts. The kit is extremely easy to use, is effortless to get started with, and provides a genuinely enjoyable user experience.
We are so satisfied with the kit and its performance that we are currently experimenting with the ability to use this board in other classes, such as Computer Architecture as well as Microprocessors I and II. In collaboration with Jesse Taube, a Junior Undergraduate student, we are developing multiple RISC-V cores for students to experiment with on real devices, not just a simulation environment. We are planning on using the IP developed by students in ADSD in conjunction with these RISC-V cores to further enhance student experience. With this, students will be able to write software for the same cores they have developed, further rounding our Computer Engineering curriculum.
The Cyclone V GX Starter Kits are also being used by students in directed studies-based projects. The collection of on-board peripherals allows for students to perform a wide array of experiments and projects without the need for external hardware. Furthermore, easy integration with already existing hardware by providing Arduino-compatible headers extends the capabilities of an already capable platform to stratospheric heights. Overall, the Cyclone V GX Starter Kits is phenomenal, and it has allowed us to enhance our curriculum to new heights. We would like to once again thank Intel and Terasic for providing us with these materials. We are happy to share images of our success in this front. These can be found below.
(a) Laboratory computer setup running Quartus Prime and FPGA board connected to machine.
(b) Prototype of the μUML-V (read as micro UML five) core on the FPGA, a core being developed for our Computer Architecture class. The seven segment displays are being driven by an IP core developed in Advanced Digital Systems Design.
(c) Prototype SoC with the μUML-V core and peripherals.
Professor: Dr. Orlando Arias
University of Massachusetts Lowell
The University of Southern Mindanao, Department of Electronics Engineering, extends its heartfelt gratitude to Intel® and Terasic for the generous donation of FPGA boards. These advanced tools are enabling our students to gain practical experience and enhance their learning in digital design and system implementation.
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About e-Yantra
e-Yantra – a project in the Department of Computer Science and Engineering (CSE), IIT Bombay, Mumbai, INDIA - is a flagship project of the Ministry of Education (MoE) through the National Mission on Education through ICT (NMEICT) to spread Embedded systems and Robotics education in colleges across India. e-Yantra complements the existing higher education system through project-based learning. e-Yantra, a robotics outreach project at IIT Bombay has successfully trained over 200,000+ students through various initiatives, and a popular one is the Robotics competition among young engineers in India.
Training and Competition e-Yantra Robotics Competition (eYRC) e-Yantra’s signature robotics competition started in 2012 and this year we have trained 10,800 students through our competition in complex engineering skills through project based learning. Every year we have different problem statements divided into themes.
Since 2020, we have been using DE0-Nano boards to train students in our yearly competition. The problem statement centred around leveraging the DE0-Nano board's capabilities. Our training has covered various topics, including Verilog HDL for FPGA programming, sensor interfacing, actuators and pick-place mechanism, harnessing parallel processing for enhanced computational efficiency, developing sophisticated path planning algorithms, and integrating wireless communication. A pinnacle of our training evolution this year was the implementation of a RISC-V CPU on theFPGA. This significant thematic shift challenged our team and highlighted the DE0-Nano board's adaptability and performance in handling complex computational tasks. Some of the features of the DE0-Nano board we found helpful over other products:
- Form factor: support of the ~22K LUTs with 32MB SDRAM available makes it the right choice for the application we want to develop.
- Easy to use: for beginners, the board comes in handy for porting the design from Quartus software on the FPGA; it is functionally easy to set up the tools and realise the design.
- Support: the documentation
e-Yantra is a flagship project of the Ministry of Education that is conducted by us at IIT Bombay that runs such competitions to train young engineers by challenging them to solve real-world problems through robotics. This year's edition, themed "Space Exploration," features the Astro-Tinker' theme that has the participants learn Verilog programming to program a robot built using your FPGA board.
We wish to invite your team to the e-Yantra Robotics Competition Grand Finale on March 22nd - 23rd, 2024 at IIT Bombay. We'd be happy to have your team member as a Jury member for the AstroTinker Bot (AB) on March 22, 2024 at 1615 to 1800 (IST) where students will showcase their work around the DE0-Nano board.
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Ajit M Harpude Assistant Project Manager. |
Intel Israel Innovation team
Intel Israel Innovation team has been diving deep into the world of FPGA education and prototyping, specifically using Altera's powerful platforms, and the experience has been nothing short of transformative. Running workshops focused on creating retro games directly on RTL with VGA screens has opened up a new dimension of creativity and learning. The feedback from participants has been overwhelmingly positive, showcasing the engaging and educational nature of these sessions.
We've been utilizing Terasic platforms, which have proven to be exceptionally reliable and versatile for our competitions. Their performance and compatibility with Altera FPGAs have significantly contributed to the success of our workshops, allowing participants to push the boundaries of digital design and gaming.
We highly recommend our workshops to anyone interested in diving into FPGA development or looking to relive the classic era of retro gaming with a modern twist. It's a unique opportunity to learn, create, and compete. We invite everyone to join us on this exciting journey at cpugarage.co.il, where the world of FPGA opens up endless possibilities for innovation and fun.
You are welcome to get a look at our latest competition where engineers and students developed games on RTL alone: https://cpugarage.co.il/competitions/2 .
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Avi Salmon Head of Intel Israel innovation office. |
Swiss Federal Institute of Technology EPFL
Terasic has been a great partner in providing wonderful FPGA boards. We have been using several models in research over many years. We have also been using the DE10-Lite board in classes related to digital systems design. Students are guided in hands-on laboratory sessions, and then carry over a prototyping project using the on-board modules as well as additional extension boards or modules that are placed on the GPIO extension ports. The boards are very reliable and the development environment is very flexible which creates excellent conditions for an efficient learning curve during the class and also further in self-teaching, as the boards are commercially available at a reasonable price.
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SProf. Alexandre Schmid Head, EPFL SCI STI AXS Group |
Altera (Now Intel® )
我在 Altera 负责行动回程网络/电信级以太网络转换工程; 我们使用友晶 SFP-HSMC 子板连接 Altera 开发板来建立以太网络开关‚ 受用无穷｡
Mark Lewis‚
Altera (现为 Intel®
)工程经理
AGH University of Science and Technology
我叫 Jacek Dlugopolski｡ 我住在波兰‚ 在克拉科夫的 AGH 科技大学工作｡ 我是一个对于所有创新﹑充满未来性的技术以及理论有着满腹热情的人‚ 而 FPGA 就是这样的技术之一｡
能够理解 FPGA 技术的优势和可能性就像发现地球并不是平坦的那样令人惊奇‚ 而是在三度空间或更三度世界中以各种方式相互影响的众多其他平行天体之一｡
从使用微处理器到使用 FPGA 的演进过程其实有点像从平面世界演进到量子宇宙的过程那样｡ FPGA 拥有大规模并行计算的特点‚ 提供了建构并行信息处理算法的惊人能力‚ 进而避免过多不必要的延迟‚ 更有效地模拟了我们现实世界的行为｡
我非常感谢友晶推广这项技术并创建了许多不同的模块来帮助人们使用 FPGA｡ 我个人使用了许多友晶的产品‚ 例如: DE2 ﹑DE2-70 ﹑DE0-nano ﹑DE10-lite 和其他 Intel® 的产品: Cyclone﹑MAX10 和 Stratix FPGA 系列｡ 所有这些友晶经过专业设计和制造的产品‚ 都非常有帮助‚ 并且非常可靠｡
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School: AGH University of Science and Technology Jacek Dlugopolski Position: Senior Lecturer |
Cypress Semiconductor
我对于友晶的好印象来自负责 TME 温度控制开发子板以及 PME 电流控制开发子板的 PSoC 核心团队副总‚ 他们对于友晶的热诚以及具竞争力的价格感到印象深刻｡ 请持续保持｡
Palani,
Cypress Semiconductor
Design Spark
总体而言‚ DE0-Nano 不仅外观精巧‚ 同时有着实用的接口‚ CD-ROM 内容更为丰富‚ 包含电路图﹑板卡信息﹑以及许多设计工具; 此外‚ CD 中并提供包含详解步骤的设计范例教你如何建立自己的 FPGA 项目与 NIOS II 处理程序｡ 我认为这片开发板非常适合做为 FPGA 入门者的垫脚石｡
Paul Clarke via Design Spark
Russian Space Systems
"我的 FPGA 编程经验是从我购买 DE0 Nano 开始的｡ 我相信我很幸运买了那块板‚ 因为 DE0 Nano 通过详细描述如何创建第一个项目‚ 代码帮助我完成了 FPGA 编程的第一步｡ 用户手册中的第一个程序以及如何对设备进行编程｡ 此板具有开始编程 FPGA 所需的一切:
- 详细说明用户手册;
- 编程器、配置闪存芯片和 FPGA Cyclone IV 在一块板上;
- 许多引脚来控制您的设计行为并将它们连接到某个地方;
- 低成本｡
我喜欢 DE0 Nano ‚ 然后我买了 DE10 Nano ｡ 它具有高性能 SoC: Cyclone V FPGA 和 ARM 处理器｡ 它还可以将 Arduino 板连接到 DE10 Nano ｡ 今天我得到了 Max 10 Plus Board ｡ 我所有的采购都有高质量和非常有吸引力的价格｡ 我希望我会喜欢 Max 10 Plus Board ‚ 就像我喜欢使用 Nano 板一样!"
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Galiev Rinat, Electronic Engineer Russian Space Systems |
Hasselt University
"感谢友晶科技﹐你们高质量的产品﹐特别好的服务和热情帮忙｡
使用友晶科技的板子上课很有意思, 学生的反应很好｡ 谢谢友晶科技同仁们的帮忙和友谊!"
"我的课程几乎都用友晶科技的 DE1-SoC 板子 , 让学生可以用 FPGA 板去做实验和专题｡ 附上这个学期学生用友晶 FPGA 板做的实验:
https://www.youtube.com/watch?v=dduZ2esiUhk "
Prof. Luc CLAESEN,
Professor of Engineering Technology,
Hasselt University, Belgium
Lawrence Berkley National Laboratory
对于彭显恩先生及魏淑婷小姐带领的友晶科技研发团队所提供的无懈可击服务, 我想表达我无尽的感谢｡ 我们一起设计出有着 20 层结构的复杂开发板, 同时此片开发板包含了三片 FPGA﹑DRAM﹑SRAM﹑闪存﹑以太网络﹑USB﹑RS-232 等许多的原件｡从很多层面来看, 这块板子已经是一块多功处理器计算机系统板, 唯一不同之处, 在于此块板子使用的是 FPGA 而非微处理器...more
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William W. Moses – Senior Staff Scientist, IEEE Fellow, Lawrence Berkley National Laboratory, Califonia |
Lawrence Berkley National Laboratory
友晶所提供的服务, 远超过我们的想象! 友晶不仅提供关于本计划的完整图式, 亦定义了设计错误的修正与设计升级的范式, 在制造过程中, 更要求完善的测试流程｡ 与友晶的繁复讨论过程中, 友晶尽其可能满足我们的制作要求, 即便须自行吸收增加的成本, 依旧能在期限内完成此项目｡ 这不仅是高质量的研发能力, 更是高规格的制程表现｡ 这次的成功合作, 让我们建立与友晶的信赖关系, 希望未来能有机会继续与友晶合作｡more
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Woon-Seng Choong – Staff Scientist, new Principle leader for this OpenPET project Lawrence Berkley National Laboratory, Califonia |
McGill University
我从 1997 年开始教中级数位电路设计课程跟实验｡ 1998 年开始用 Altera 的开发板和 Quartus 软件｡
2008 年后, 我们改用友晶的 FPGA 开发板, 如 DE1 和近期的 DE1-SoC ｡ 板子和 Altera Quartus 软件搭配, 非常适合在课堂上给学生做练习｡ 学生能够用 VHDL 设计数字硬件, 编译并下载到 Terasic 开发板, 再去测试他的设计还有除错｡ 新进的 SoC 开发板则提供学生练习软硬件协同设计的机会, 让我们能更好的衔接上计算器工程学近期课纲的变化｡
最后我也要感谢大学计划, 提供大量的教材, 帮助我们开发课程﹑也让学生得到更多实用的信息｡
Professor James Clark–
Department of Electrical and Computer Engineering, McGill University
Manhattan College
我非常高兴能与 Altera 以及友晶接触, 并在最短的时程内订购并且收到了板卡｡ 我原本希望在来年一月开学时能将一切准备就绪, 但板卡十月中就寄到了! 这使我有机会能够更早开始使用新板卡｡ 更好的是, 我也有了实物让我在本学期的数字系统入门课程中使用｡
学生们相当热爱使用新板卡以及附带软件, 也殷殷期盼在下学期的计算器组织课程中使用｡ 我们希望大学四年的课程里有更多计算器工程计划的核心以及选修课堂都能有这样的硬件环境｡ 现在我们的第一步便是筹措资金更换效能更好的个人计算机以利执行 Quartus 软件｡
Doug Godsoe, Ph.D.
曼哈顿大学 电机工程/计算器工程助教
Mercury Consulting Group
我正在评估用于 Stratix IV 的 Altera 开发板, 并担心可能需要大量工作和故障排除才能使第一个像素正确显示和内存正常工作, 甚至在添加特殊 DSP 功能之前｡ 我对 Terasic 的经验是, 我可以让系统快速产生有用的结果（担心视频, 但更重要的是良好的声音 DDR 内存）并从那里继续进行自定义修改｡ 此外, 我正在努力确保我不会陷入 System Builder 帮助完成的重复性任务中, 例如引脚定义｡
Bil Herd
President / Founder of Mercury Consulting Group
Milwaukee School of Engineering
我的大学十分仰赖 DE0-Nano SoC 以及 LT24 触控子板, 我们透过这些板子学习数字逻辑和嵌入式系统｡ 以一个学生的角度来说, 友晶的产品真的很可靠, 又容易上手, 并且有丰富的周边学习资源可以利用｡
Hughes Kevin
信息科学系大四生
密尔瓦基工学院，美国
Multimedia University
我们非常感谢友晶科技设计制造了许多接口丰富的 FPGA 开发板, 同时提供学术界非常实惠的价格｡ 这些板子让我们能够学习并操作最新的数字逻辑设计技术及嵌入式系统; 这些宝贵的经验绝对能帮助我们成为未来的数字逻辑设计师｡ 非常谢谢你们的努力!
Thum Chia Chieh,
Lecturer, Faculty of Engineering and Technology Multimedia University
North Carolina Agricultural and Technical State University
团队与个人感谢您｡ 我知道你们每个人都为我们如此迅速地获得了 85 片 MAX 10 DE10-Lite FPGA 板 而创造了“奇迹”｡ 我们已经将它们分发给我们的学生｡ 更多好消息等着你｡
感谢北卡罗来纳州农业技术州立大学工程学院的所有人｡
Dr. John Kelly
Associate Professor
North Carolina Agricultural and Technical State University
Rowan University
近二十年来, Rowan University 依靠 terasIC 为学生提供高质量的 FPGA 开发工具套件, 以学习数字系统, 计算器体系结构和嵌入式系统｡ 我在课程中一直要求我的学生使用 DE0-Nano , DE0 和/或 DE10-Lite , 因为 terasIC 所提供的开发工具套件确实很有帮助, 学生们在实验室外也能够继续进行实验｡ 我们对 terasIC 的产品, 销售和技术支持非常满意, 并将继续使用 terasIC 开发工具包｡
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Michael D Muhlbaier Instructor of Electrical and Computer Engineering Rowan University, New Jersey |
Stanford University
友晶科技协助我们打造最先进的 FPGA/SoC 实验室并且总是能及时的为我们提供专业帮助, 是一个非常出色的合作伙伴｡ 我由衷感谢友晶科技提供给我们的一流质量及上等的服务!
史蒂文克拉克博士,
史丹佛大学电机工程系教学实验室经理
University of Eastern Philippines
I am Engr. BLESS G. AMPUAN, currently working as Instructor in University of Eastern Philippines. I am honored and grateful to the Intel FPGA Academic Program through the Terasic, for donating DE10-Standard which will be utilized for instructional and research purposes. The boards were utilized by the electrical engineering students in their subjects ECE311 Logic Circuit and Switching Theory and ECE321 Microprocessor Systems. The FPGA is somehow new to us, at first we find it complicated but right we read the user manual, these boards are very helpful and interesting in school laboratory activities. My students are very enthusiastic to use the said boards. I highly recommend DE10-Standard because the board itself is so comprehensive and a very powerful electronic kit which can be used for school and research outputs. Thank you Terasic for this powerful FPGA boards.
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Instructor: Engr. Bless G. Ampuan |
Wright-Patterson Air Force Base
我希望就我初次使用 DE2 多媒体开发板 的经验, 提供意见予大家参考｡ 在用过 Altera 的 UP2, UP3 开发板以及许多以 Xilinx FPGA 为主的板卡如 Xess XSA-100 及 Burched B5-X300 等各有优劣处的板卡后, 我认为 DE2 是我用过的板卡中最好的一套! 详尽的使用说明﹑设计周到的 PCB 板﹑以及完整的程序范例…DE2 着实是我所见过拥有最佳学习文件及完善范例的一套板卡｡ 我愿意提供我的评论供大众参考｡
Douglas Hodson,
美国 Wright-Patterson 空军研发基地
XINADIST
我在英特尔 FPGA 技术培训合作伙伴 XINADIST 负责培训﹑外包开发和咨询｡ 我经常看到许多研究人员和开发人员使用 Terasic 提供的电路板和文文件成功地执行了他们的项目｡ 他们可以使用 Terasic 的评估板和最新的 FPGA（如 Stratix10﹑Arria10﹑MAX10）来缩短开发时间。
下面的照片展示了我们如何在韩国一所大学的教室中使用 DE1-SoC 板进行教育｡ Terasic 板嵌入了 USB blaster I 或 II, 您无需使用 JTAG 下载电缆｡ 由于您可以轻松地将其连接到计算器并与 Quartus 一起操作电路板, 因此您可以使用 Verilog-HDL 或 VHDL 快速建模和验证操作｡ 此外, 使用 NiosII 和 RISC-V 等微处理器内核, 您可以轻松验证 IP｡ 最后, 您可以使用 Stratix、Arria 和 Cyclone V SoC 系列练习基于 linux 的操作系统移植﹑设备驱动程序和各种应用程序｡
XINADIST
Aaron Yang principal engineer
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