 | Altera DE3 最新高速高级开发平台 |
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Altera Stratix III 3SL340 FPGA with 338,000 LEs |
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DDR2 SO-DIMM Socket |
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SD Card Socket |
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Altera Serial Configuration deivices (EPCS128) for Stratix III 3SL340 |
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USB Blaster built-in for programming and user API controlling |
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USB Host/Slave Controller with one mini-AB for host/device and two |
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type A for device |
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Eight 180-pin High Speed Terasic Connectors ( HSTC ) |
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Two 40-pin Expansion Headers with diode protection |
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 | Altera DE2-70 最新多媒体开发平台 |
- Altera Cyclone II 2C70 FPGA with 70000 LEs
- 2x32Mbyte SDRAM, 8Mbyte Flash Memory, 2Mbyte SSRAM
- Two TV Decoders (NTSC/PAL), IrDA, USB (Host+Slave)
- SD Card Socket, RS-232, Ethernet, 10-bit VGA, 24-bit Audio CODEC
- Altera Serial Configuration deivices (EPCS16) for Cyclone II 2C70
- USB Blaster built in on board for programming and user API controlling
- Many examples with source code (including TV PIP Box, SD Music Player)
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 | Altera DE2 多媒体开发平台 |
The purpose of the Altera DE2 Development and Education board is to provide the ideal vehicle for advanced design prototyping in the multimedia, storage, and networking. It uses the state-of-the-art technology in both hardware and CAD tools to expose designers to a wide range of topics.
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 | Altera数字相机及多媒体开发平台 |
产品共有 3 种组合,产品内容包含相关设计程序代码,让使用者的研究能有效的发展。
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 | Altera DE1 多媒体开发平台 |
• Altera Cyclone II 2C20 FPGA with 20000 LEs
• Altera Serial Configuration deivices (EPCS4) for Cyclone II 2C20
• USB Blaster built in on board for programming and user API controlling
• 8Mbyte SDRAM, 4Mbyte Flash Memory, 512K SRAM
• SD Card Socket, RS-232, VGA, 24-bit Audio CODEC
• Many examples with source code (including SD Music Player)
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 | C3H-DEV 高阶超大型嵌入式系统开发软件 - RMB $ 5779 |
The Cyclone III FPGA Development Kit is designed to be an efficient FPGA in terms of power and cost with a set of memories and user interfaces which is ideal for users designing their FPGA. It is perfectly suited as embedded processors or microcontrollers when combined with Altera’s 32-bit Nios II embedded processor intellectual property (IP) Cores.
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 | NEEK 高阶多媒体嵌入式系统开发软件 - RMB $3049 |
The Nios II Embedded Evaluation Kit, Cyclone III Edition features a low power, low-cost Cyclone III FPGA evaluation board for embedded developers by accessing and implementing their own design using the LCD color touch panel with ease. It includes tools necessary to integrate powerful graphics within the FPGA by allowing software developers to install and evaluate the Nios II Embedded Design Suite (EDS) which is a comprehensive suite for software developers.
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 | Nios II Embedded Evaluation Kit (2.0) - Upgrade Package - RMB$3290 |
| The NEEK upgrade package is perfectly for users who have Cyclone III FPGA Starter Kit to upgrade their CIII Starter Board into a Nios® II Embedded Evaluation Kit, Cyclone® III Edition |
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24-bit CD-quality Audio CODEC with line-in, line-out, |
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and microphone-in jacks |
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10/100 Ethernet |
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VGA output , composite TV-in, audio-out, |
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audio-in, and microphone-in |
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128-Mbyte SD card and USB to SD card adapter |
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 | 4.3 英吋数字 LCD 触碰面板套件 |
最新推出 4.3 英吋 数字 LCD 触碰面板套件 – 件附有 触碰式数字像框及图像产生器等参考设计与所有原始程序代码 (Verilog) 。此套件获 Altera 总公司采用于配合 Altera DE2-70/DE2/DE1 多媒体开发平台,用于全球研究机构及企业单位做为影像 Panel 开发用途。
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 | Altera DE-Nano 名片型 CPLD 开发平台 |
• 以最低價格提供最大容量的 Max II CPLD
• MAX II CPLD 是同業的2倍
• 板卡上內建價值 NT$1680 的 USB Blaster 下載電纜
• 此 MAX II Micro Kit 可獨立當成一條 USB 下載線(只支持 JTAG mode 下載)
• 由 Altera 之全球 FPGA 板卡生產夥伴友晶科技所設計研發,品質保證
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 | 高阶 TREX-S2 Stratix II FPGA 验证平台 |
• Provide almost 700 available user IOs (more than any other prototyping board using EP2S/1020 BGA devices) • Provide high-speed IO connections via samtec connectors • Provide memory devices on the motherboard (DDR and SDRAM) • Flexible and configurable - can be used as acceleration cards for DE2/TREX C1 Boards. • Provide default motherboards for free - with schematic/layout design libraries for users to develop their own motherboards.
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 | 500万像素数字相机模块卡 |
本平台提供所有硬軟件及示範程序Verilog code. 本套件包含:
• Terasic TRDB_D5M 5萬像素数字相机模块卡
• 完整的 Verilog 程序碼及範例 demo
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 | 130 万像素数字相机模块卡 (已售完) |
本開發平台榮獲 Altera 總部大量採購用於 2006 年四月全球嵌入式系統會議展出 . 本平台提供所有硬軟件及示範程序 Verilog code. 本套件包含 :
• Terasic TRDB_DC2 130 萬像素相機轉板
• 完整的 Verilog 程序代碼及範例 demo
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 | 3.6 英寸数字 LCD 面板開發套件 (已售完) |
TRDB_LCM 為最新推出 3.6" 數碼LCD 面板套件 - 套件附有電視盒及圖像產生器等參考設計與所有原始程序代碼(Verilog). 此套件獲 Altera 總公司採用於配合 Altera DE2 多媒體開發平台, 用於全球研究機構及企業單位做為影像 Panel 開發用途.
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 | HSMC to Santa Cruz / USB / Mictor 子卡 |
THDB-SUM (HSMC to Santa Cruz / USB Mictor 子卡) 是兼具了 HSMC、SC (Santa Cruz)、USB、Mictor 及 SD 记忆卡等介面的板卡。使用者能方便地在具有 HSMC 接头的主板上使用此板卡做为桥接介面。
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 | 高速 数位-模拟 / 模拟-数位 模组卡 |
THDB_ADA 子板為 DE 系列、Cyclone III Starter Kit 及其他有 HSMC 或 GPIO 介面的 FPGA 平台提供了 DSP 的解決方案。
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 | HSMC to Santa Cruz Daughter Board (已售完) |
THDB-H2S (HSMC to Santa Cruz Daughter Board) is an adapter board for converting High Speed Mezzanine Card (HSMC) connector to Santa Cruz (SC) interface which allows users to use the SC interface boards on a board with a HSMC connector. Also, the source signals form the HSMC connector to the SC header on the THDB-H2S board pass through level shifters to adjust the logic level difference between the HSMC and SC interface board.
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 | HSTC-GPIO 高速轉接頭轉板 |
HSTC-GPIO 高速转接头转板 (HTG) 是用来转换友晶高速连接器 (HSTC),或是 Mezzanine 高速连接器 (HSMC) I/Os 成为三个 40 pin 的GPIO 转接头而设计的。
这个子板与友晶 DE3、DE2-70、DE2、DE1 扩充插头兼容。
使用者经由一片 HTG 子板,可以一次将最多三片友晶 DE3、DE2-70、DE2、DE1 主板或是其它友晶子板,连结至 HSTC/HSMC 接口主板。
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 | HSMC to GPIO Daughter Board (已售完) |
The THDB-H2G (HSMC to GPIO Daughter Board) board is designed to fan out the High Speed Mezzanine connector (HSMC) I/Os to three 40-pin expansion prototype connectors, which are compatible with Altera DE2/DE1 expansion headers. Users can connect up to three Altera DE2/DE1 boards (or associated daughter cards) onto a HSMC-interfaced host board via the THDB-H2G board.
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 | Terasic TREX C1 FPGA 多媒体开发平台 (已售完) |
“TREX C1 FPGA 多媒体开发平台”使用 Altera Cyclone (EP1C6Q248C8) FPGA,是业界唯一内建 USB Blaster 电路的开发套件,提供你一个完整、便宜且容易学习的 FPGA 多媒体发展平台。
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 | Altera DE2 多媒体平台及数字 LCD 面板, 相机套件组 |
ALTERA 全球最新 CycloneII 多媒体开发平台,130 万像素数字相机模块参考设计,及 3.6 英吋数字 LCD 显示模块 ( 含 source code)
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 | GiDEL PROC2S - FPGA 单颗开发平台 |
- GiDEL PROC2S - FPGA 单颗开发平台
- 全世界体积最小、容量最大之 FPGA 开发平台.
- 大量应用于高端仪器量产制造.
- 使用 Altera 最新 Stratix-II 60/130/180 FPGA.
- 提供 314 个 IO 埠.
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 | GiDEL PROCStar II - 1~4 颗 FPGA 开发平台 |
- GiDEL PROCStar II - 1~4 颗 FPGA 开发平台
- 快速 ASIC/IC 功能性验证: Prototyping and Emulation.
- 需以极低成本, 并以最短时间内完成设计验证之情况.
- 复杂度高之ASIC验证, 难以估算出所须 FPGA及系统资源情况.
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